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DataPath.hxx
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1995-07-26
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///////////////////////////////////////////////////////////////////////////////
//
// DataPath.hxx - Data Path for the Hector 1600 CPU
//
// By: Bradford W. Mott
// December 3,1993
//
///////////////////////////////////////////////////////////////////////////////
#ifndef DATAPATH_HXX
#define DATAPATH_HXX
#include "BasicCPU.hxx"
#include "ALU.hxx"
#include "RegisterSet.hxx"
enum DataPathBus { NONE, A_BUS, B_BUS, ALU_BUS };
///////////////////////////////////////////////////////////////////////////////
// The Data Path for the Hector 1600 CPU
///////////////////////////////////////////////////////////////////////////////
class DataPath {
private:
BasicCPU* cpu; // Pointer to the CPU
int A_SEL; // A BUS Register Select
int B_SEL; // B BUS Register Select
unsigned int WRT_A; // Write Register A
unsigned int WRT_B; // Write Register B
unsigned int DB_GT; // Data Bus Gate
unsigned int ALU_GT; // ALU Bus Gate
ALUFunction ALU_FN; // ALU Function Select
DataPathBus MDR_SEL; // Mux value for Memory Data Register
unsigned int MDR_LATCH; // Memory Data Register Latch
unsigned int MDR_OUT_EN; // Memory Data Register Output Enable
unsigned int MAR_LATCH; // Memory Address Register Latch
unsigned int MAR_OUT_EN; // Memory Address Register Output Enable
DataPathBus MAR_SEL; // Mux value for Memory Address Register
unsigned int IR_LATCH; // Instruction Register Latch
unsigned int a_bus; // Value on the A Bus
unsigned int b_bus; // Value on the B Bus
unsigned int alu_bus; // Value on the ALU Bus
unsigned int data_bus; // Value on the Data Bus
unsigned int wrt_bus; // Value on the Write Bus
unsigned long number_of_reads; // Number of memory reads
unsigned long number_of_writes; // Number of memory writes
unsigned long number_of_cycles; // Number of cycles
// Read a word from memory
int Peek(unsigned long address, unsigned int& value);
// Write a word to memory
int Poke(unsigned long address, unsigned int value);
public:
RegisterSet register_set; // The register set
ALU alu; // Hector's ALU
unsigned int ir; // Instruction Register
unsigned int mar; // Memory Address Register
unsigned int mdr; // Memory Data Register
DataPath(BasicCPU*);
~DataPath();
// Reset the data path's signals
void ResetSignals();
// Called at the end of each cycle to perform the actual cycle operations.
// Returns NULL or a pointer to an error message.
const char* Clock();
// Return the number of read memory accesses
inline unsigned long NumberOfReads()
{ return (number_of_reads); }
// Return the number of write memory accesses
inline unsigned long NumberOfWrites()
{ return (number_of_writes); }
// Return the number of cycles
inline unsigned long NumberOfCycles()
{ return (number_of_cycles); }
// Clear the statistics (reads, writes, cycles)
inline void ClearStatistics()
{ number_of_reads=number_of_writes=number_of_cycles=0; }
// Selects a register to be put on the A_BUS
void a_sel(int reg);
// Selects a register to be put on the B_BUS
void b_sel(int reg);
// Latch WRT_BUS into A register
void wrt_a();
// Latch WRT_BUS into B register
void wrt_b();
// Gate DATA_BUS onto WRT_BUS
void db_gt();
// Gate ALU BUS onto WRT_BUS
void alu_gt();
// Select an ALU Function
void alu_fn(ALUFunction function);
// Select Bus
void mdr_sel(DataPathBus bus);
// Latch selected bus contents into MDR
void mdr_latch();
// Allow MDR to drive the Data Bus
void mdr_out_en();
// Select Bus
void mar_sel(DataPathBus bus);
// Latch selected bus contents into MAR
void mar_latch();
// Allow MAR to drive the Address Bus
void mar_out_en();
// Latch IR
void ir_latch();
};
#endif